Design of a 50-qubit ion-trap demonstrator apparatus and chip

The QVLS-Q1 research consortium is comitted to building a 50-qubit ion-trap based quantum computer. We present work towards the realization of this goal. We have designed and started assembly work on a demonstrator apparatus, based on previous work [1]. A cryogenic apparatus with 300 dc-, nine radiofrequency- and nine optical interconnects. The apparatus will house a multi-layer surface electrode ion trap-chip, which is designed and fabricated in house. The trap-chip consists of an ion-shuttling junction [2], ion-storage registers, a readout register and a computation zone, where near-field microwave gates will be applied [3]. We present the apparatus and chip design works and current progress.

[1] T. Dubielzig et al., Rev.Sci. Inst. 92.4 043201 (2021)

[2] R. B. Blakestad et al., Phys. Rev. Lett. 102 153002, (2009)

[3] M. Duwe et al., Quant. Sci. and Techn. 7.4, 045005 (2022), G. Zarantonello et al., Phys. Rev. Lett. 123, 260503 (2019)